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fix(recompiler): fill missing pixel interpolators as DEFAULT - #6604
oneandonlydean merged 5 commits into
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PPSA03541 prepares a pixel shader that still reads attribute 0 while SPI_PS_IN_CONTROL.NUM_INTERP is 0; extend the CNTL table with OFFSET 0x20 defaults instead of throwing. Co-authored-by: Cursor <cursoragent@cursor.com>
After collector coverage, emit still rebuilt pixel input info from SPI and threw undefined attribute for the same UFC5 shader; return OFFSET 0x20 defaults from SPIR-V emission too. Co-authored-by: Cursor <cursoragent@cursor.com>
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Intel and AMD Windows data: the new test passes on both GPUs with this change and fails on both without it. Windows 11 Pro 26300, WinLibs GCC 15.2.0 r7, Release, every execution test built,
Full CTest ( AI-assisted: yes (Claude Code) |
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Windows NVIDIA run of the GPU tests, since the description lists the collector test only. Windows 11 Pro 26200, NVIDIA GeForce RTX 4080 (driver 617.42), AMD Ryzen 7 5800X, WinLibs GCC 15.2.0 r7, Ninja, Release, bundled dependencies,
No title run. AI-assisted: yes (runs done with Claude Code). |
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Tested on Windows 11, MinGW-w64 GCC 15.2.0, NVIDIA GeForce RTX 5090 (driver 617.42), Ryzen 9 9950X3D. Head
Two things I could not settle from the diff:
I am not approving until the title run is shown. AI-assisted: yes. Written with AI assistance and reviewed by me. |
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Tested on a PC with a real title, EA SPORTS UFC 5 (PPSA03541), as a controlled A/B. Both runs used the same base, upstream main 819c547, plus #6549, #6563 (resolved against main) and #6572, which UFC 5 also needs. The only difference was this PR. Without this PR: the game aborts at +205 s of the run. The log shows With this PR: the same shader 0x114073b400 stage 5 is prepared at use (+424.8 s), and the game does not abort. It kept running for the rest of a 1000 s session, with no abort, fatal or driver-failure line in the log. Caveats: this is one run each, and the abort and shader prepare times differ because I played to the match by hand. The game is still very slow after this point (about 0.2 to 2 fps), which is a separate problem this PR does not touch. I did not run the unit tests as part of this check. AI-assisted: yes. Written with AI assistance and reviewed by me. |
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Thanks, the fix is scoped well: it only changes shaders that fail to compile on main today. Two things before merge:
Minor, no change needed: |
# Conflicts: # docs/dev/debt/shader.md
…g a title Name no title, title ID or shader address in the entry. The mechanism text is unchanged.
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We merged current main and reworded the debt entry so it names no title; no code change. |
What
When the IR reads a pixel attribute at or past
SPI_PS_IN_CONTROL.NUM_INTERP, fill the missingSPI_PS_INPUT_CNTLslots as DEFAULT (OFFSET0x20) before shader info collection, and emit the same defaults fromGetInterpolationParameterwhen the attribute has no SPIR-V binding (emit rebuilds input info from SPI and would otherwise throwundefined attribute). Component and mode bounds still throw.PPSA03541 (UFC 5) prepares pixel shader
0x114073b400at use withNUM_INTERP0 while it still issuesv_interpon attribute 0.Tested
interpolation_reference_range_testspassed (collector coverage)undefined attribute; this follow-up addresses that emit path (retest after deploy)Checklist
main; no other open PR implements the same functionsNotImplemented_nid_no_patch); silent stubs are listed under Silent stubs in their library's technical debt file.mdfiles or images added to the repository (attach them to this PR)